Memory devices are typically provided as internal, semiconductor, integrated circuits in computers or other electronic devices. There are many different types of memory including random-access memory (RAM), read only memory (ROM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), static random access memory (SRAM) and flash memory. The demand for high density semiconductor memory devices increases year after year. Better manufacturing processes have been developed to meet this demand; however, as the density of memory components increases to meet the demand, there is a higher probability of memory errors occurring due to the manufacturing process. Memory errors can corrupt data and result in the permanent loss of business data and lost revenue from downtime.
Built-in self testing (BIST) of the memory device is commonly employed to identify defects that occur during the manufacturing process that may result in memory errors. When a defective memory cell is identified during this testing process, the defective memory cell is conventionally remedied by utilizing redundant memory cells within the memory device. As such, the defective memory cell is repaired by replacing one or more columns or rows containing the defective memory cell with the column or row containing the redundant memory cell. This replacement technique is generally accomplished through the use of fuses. A fuse associated with the defective cell is blown to indicate that the memory cell is defective, and an address presented on the associated row or column is then rerouted to the redundant operational memory cell thereby effectively repairing the cell. With this testing and redundancy method, improved yields in semiconductor storage devices are achieved.
One of the defects that occurs during the manufacturing process is one in which a local word line or a global word line of the memory device experiences an open metal trace or a highly resistive metal trace due to a process defect. When this occurs, a first portion of the word line that connects to the word line driver is electrically separated from a second portion of the word line by this open or highly resistive trace. Redundancy techniques can be used to repair and reroute the memory function. However due to the open trace condition, the second portion of the word line is not electrically connected to the first portion of the word line. As a result, the second portion of the word line is left in a logically floating state. Over time, this floating portion of the word line can become a logical high due to charge accumulation. When the floating portion of the word line is always at a logical high, and therefore always “on,” the floating portion can interrupt the correct reading of another row in the memory device, causing a read error. Because the problem occurs as a result of charge accumulation it is typically not discovered until after the product has been shipped to a customer. Moreover, this problem may not be discovered until months or years after the part is delivered to the customer. This potential for a read error to occur presents a significant reliability problem for the memory device.
Accordingly, what is needed in the art is a system and method to improve the reliability of a memory device by controlling the floating portion of a word line resulting from an open or highly resistive trace present in the word line due to a process defect.